상품이미지
  •  상품이미지

MPN : CY2308ZXI-1H

Infineon CY2308ZXI-1H PLL Clock Buffer 16-Pin TSSOP
  • 브랜드

    Infineon

  • 무원상품코드

    M011009005311

  • 타입별
    EA
  • 주문가능수량

    품 절

  • 최소주문수량1
  • 판매단위1
  • 제품정보
  • 배송정보
    (영업일 기준)
  • 특이사항
구매수량 :

*대량구매해택
  • 수량단가1 : 1개 ~ 19,954원

  • 수량단가2 : 24개 ~ 19,455원

  • 수량단가3 : 48개 ~ 19,155원


총금액
(VAT 별도)

  • 상품정보
  • 상품후기
  • 상품문의
  • 배송/AS안내

■ 제품필수정보

제조사 Infineon
제조사품명 CY2308ZXI-1H
간략설명 Infineon CY2308ZXI-1H PLL Clock Buffer 16-Pin TSSOP

■ 제품사양


칩당 요소 수 = 1 Maximum Supply Current = 70 mA Maximum Input Frequency = 133.3MHz
장착형태 = Surface Mount
패키지 = TSSOP
핀수 = 16
크기 = 5.1 x 4.5 x 0.95mm Length = 5.1mm Width = 4.5mm
높이 = 0.95mm Maximum Operating Supply Voltage = 3.6 V
최대 작동 온도 = +85 °C Maximum Output Frequency = 133.3MHz Minimum Operating Supply Voltage = 3 V
최소 작동 온도 = -40 °C The CY2308 is a 3.3 V Zero Delay Buffer designed to distribute high speed clocks in PC, workstation, datacom, telecom, and other high performance applications. The part has an on-chip PLL that locks to an input clock presented on the REF pin. The PLL feedback is driven from external FBK pin, so user has flexibility to choose any one of the outputs as feedback input and connect it to FBK pin. The input-to-output skew is less than 250 ps and output-to-output skew is less than 200 ps. The CY2308 has two banks of four outputs each that is controlled by the select inputs as shown in the table Select Input Decoding on page 3. If all output clocks are not required, Bank B is three-stated. The input clock is directly applied to the output for chip and system testing purposes by the select inputs. The CY2308 PLL enters a power down state when there are no rising edges on the REF input. In this mode, all outputs are three-stated and the PLL is turned off resulting in less than 25 μA of current draw.

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